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Aggregate Semiconductor Engineering 芯片半导体 45″

What Will It Take To Deploy CPO At Scale?

Co-packaged optics (CPO) is at an inflection point.We see it rapidly transitioning from proof-of-concept prototypes to manufacturable systems.…

  • Today, we’re already starting to see the technology embedded in scale-…
  • While the technology shows promise for AI infrastructure by offering m…
  • A recent conversation among CPO pioneers from Alchip, Astera Labs, and…

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Aggregate Semiconductor Engineering 芯片半导体 45″

Linear Optics And The Push To Scale AI Interconnects

AI clusters keep getting larger and more demanding.…

  • Training a trillion-parameter model means thousands of accelerators wo…
  • Conventional optical interconnects weren’t built with that in mind.
  • They rely on retimers and digital signal processors (DSPs) inside the …

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Aggregate Semiconductor Engineering 芯片半导体 45″

Is Pergrammable A Word?

The price tag to invest in bespoke silicon for devices such as mobile phones, automobiles, laptops, or edge agentic token servers is enormous.…

  • Leading-edge SoCs can cost more than $200M to design, verify, and vali…
  • Semiconductor and systems companies making that level of investment wa…
  • But ensuring a solid ROI requires the design team to not only build co…

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Aggregate Semiconductor Engineering 芯片半导体 45″

Packet-Based NPUs In The LLM Era: From Compute-Bound CNNs To Memory-Bound Edge And Automotive Workloads

Many Semiconductor Engineering readers know the basic story behind Expedera’s Origin NPU IP architecture: packets instead of layers, higher MAC utilization, and less gratuitous movement of activations to external memory.…

  • What’s changing now is the workload mix.
  • Vision-only edge processors are giving way to systems where LLMs, VLMs…
  • In terms of NPU design, what are the implications when the dominant ed…

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Aggregate Semiconductor Engineering 芯片半导体 45″

What Self-Verifying Means In Agentic EDA Workflows And Why It Matters

Last month, we covered the architectural decisions behind a production-ready EDA AI agent: domain grounding, scalable orchestration across a fragmented tool ecosystem, native interpretation of EDA data formats, and security at the execution layer.…

  • These are the foundations upon which successful agentic workflows for …
  • When an agent is executing a long-running EDA workflow autonomously, m…
  • Why deterministic physics-based EDA engines matter The answer is physi…

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Aggregate Semiconductor Engineering 芯片半导体 45″

DDR5 9600 RDIMMs: Raising The Performance Benchmark For Server Memory

The rapid evolution of AI, high-performance computing (HPC) and cloud infrastructure is forcing every component of the server architecture to scale.…

  • While much attention has focused on processors and accelerators, memor…
  • As CPU core counts continue to climb and AI workloads become increasin…
  • This reality is helping drive the next step in server memory evolution…

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Aggregate Semiconductor Engineering 芯片半导体 45″

Copper’s Grip On AI Scaling Is Starting To Slip

Key Takeaways: Scale-up may go beyond one rack and may use optical interconnects for longer runs.…

  • Optical circuit switching may expand beyond Google.
  • Scale-in is a new scaling term referring to the scale of a single serv…
  • Data-center network fabrics are undergoing another architectural shift…

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Aggregate Semiconductor Engineering 芯片半导体 45″

Vertical Integration Becoming Pervasive

Key Takeaways: Hardware and software development have traditionally been disconnected, creating little opportunity to optimize system-level performance and energy consumption.…

  • Development swings between specialized and generalized solutions based…
  • Energy and thermal concerns are forcing more companies to create speci…
  • Thirty years ago, there was a lot of interest in hardware/software co-…

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Aggregate Semiconductor Engineering 芯片半导体 45″

The 1-Megawatt Rack Debate

Key Takeaways: The push toward 1-megawatt racks is forcing fundamental changes in data center architecture, including cooling, power delivery, rack design, and 3D-IC packaging.…

  • Higher rack densities may not be the only viable scaling path, as opti…
  • AI and agentic workloads are shifting systems from average-power assum…
  • Data centers are gearing up for a future in which a single rack could …

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Aggregate Semiconductor Engineering 芯片半导体 45″

Chip Industry Week In Review

Data centers UC Berkeley experts argue that AI progress does not require ever-larger data centers.…

  • Smaller open-source models are becoming capable enough for many tasks …
  • A 19-company coalition within the Open Compute Project unfurled a plan…
  • Data-center network fabrics are undergoing another architectural shift…

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